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IEEE

A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment

Abstract: This article presents a type-II sub-sampling phase-locked loop (SSPLL) that achieves low jitter, low spur, and sub-$\mu $ s locking time when synthesizing millimeter-wave (mm-wave) ...